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数字电子
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Half adder · sum = a ⊕ b, carry = a ∧ b
Half adder · sum = a ⊕ b, carry = a ∧ b
sum=a⊕b · carry=a∧b · XOR+AND 门 · 真值表
Two 1-bit inputs a, b → one XOR gate gives the sum, one AND gate gives the carry
Full adder · sum = a ⊕ b ⊕ cin, cout = (a∧b) ∨ (cin ∧ (a⊕b))
Full adder · sum = a ⊕ b ⊕ cin, cout = (a∧b) ∨ (cin ∧ (a⊕b))
sum=a⊕b⊕cin · cout=(a∧b)∨(cin∧(a⊕b)) · 级联多位
Three 1-bit inputs a, b, cin → two half-adders plus an OR gate
Boolean algebra laws · both sides always match
Boolean algebra laws · both sides always match
德摩根 ¬(A∧B)=¬A∨¬B · 分配/吸收律 · 两侧真值表恒等
Pick a law, toggle A, B, C — the two sides are equal for every row of the truth table
4:1 multiplexer · one output, four choices
4:1 multiplexer · one output, four choices
4:1 MUX · 2 选择线选 1 路 · 选路高亮 · 选择表
Two select lines pick which of four data inputs is routed to the output: Y = d[2·s1 + s0]
2:4 decoder / 1:4 demultiplexer
2:4 decoder / 1:4 demultiplexer
2:4 译码 · n 选择线激活 2^n 之一 · 真值表
Two select lines activate exactly one of four outputs: line k is high iff k = 2·s1 + s0
7-segment display decoder
7-segment display decoder
4 位 0–F → 段 a–g · 点亮显示 · 段真值表
A 4-bit input (0–F) lights the seven segments a–g that draw the digit
SR latch · cross-coupled NOR gates
SR latch · cross-coupled NOR gates
交叉耦合 NOR/NAND · 置位/复位/保持/禁止 · Q 记忆
Toggle S and R; the latch remembers Q through the hold state
D flip-flop · edge-triggered
D flip-flop · edge-triggered
上升沿 Q←D · 边沿触发 · 时序图
Q samples D only on the rising clock edge; a timing diagram accumulates
4-bit shift register · SISO / SIPO
4-bit shift register · SISO / SIPO
4 位 SISO/SIPO · 每时钟沿串行移入 · 逐级推进
Set the serial input, pulse the clock, watch the bits march across
4-bit ripple counter · asynchronous binary counting
4-bit ripple counter · asynchronous binary counting
4 位异步 · 每级二分频 · 计数 0..15 回绕
Four toggle flip-flops in a chain — each bit toggles at half the rate of the one before it
Finite state machine · \
Finite state machine · \
序列检测器 101 · 状态转移+输出 · Moore/Mealy
Feed one bit at a time — the machine walks its states and raises the output when 101 completes
RC transient · charging & discharging, τ = RC
RC transient · charging & discharging, τ = RC
充电 V0(1−e^{−t/RC}) · 放电 V0·e^{−t/RC} · τ=RC · 63%/37%
A resistor and capacitor set an exponential rise or decay with time constant τ = R·C